Kim Hyunjin | Dept. Of Electrical And Electronic Eng. Yonsei University
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概要
関連著者
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Kim Hyunjin
Dept. Of Electrical And Electronic Eng. Yonsei University
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Kang Sungho
Dept. Of Electrical And Electronic Eng. Yonsei University
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Kang Sungho
Dept. Of Electrical & Electronic Eng. Yonsei University
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KIM Hyunjin
Dept. of Electrical and Electronic Eng., Yonsei University
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Kim Hyunjin
Yonsei Univ. Kor
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Kang Sungho
Dept. Of Electrical And Electronic Eng. Yonsei Univ.
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Kang Sungho
Dept. Of Electrical And Electronic Eng. Yonsei Univsersity
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AHN Jin-Ho
Dept. of Electronic Eng., Hoseo University
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BAEK Dongmyoung
Broadcasting and Telecommunication Convergence Research Laboratory
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Ahn Jin-ho
Dept. Of Electronic Eng. Hoseo University
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Hong Hyejeong
Dept. Of Electrical And Electronic Eng. Yonsei Univ.
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KIM Hong-Sik
Dept. of Electrical and Electronic Eng., Yonsei University
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HONG Hyejeong
Dept. of Electrical and Electronic Eng., Yonsei University
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Hong Hyejeong
Dept. Of Electrical And Electronic Eng. Yonsei University
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Baek Dongmyoung
Broadcasting and Telecommunication Convergence Research Lab.
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PARK Hyuntae
Dept. of Electrical and Electronic Eng., Yonsei University
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LEE Jung-Hee
Broadcasting and Telecommunication Convergence Research Laboratory, ETRI
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Park Hyuntae
Dept. Of Electrical And Electronic Eng. Yonsei University
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Lee Jung-hee
Broadcasting And Telecommunication Convergence Research Laboratory Etri
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AHN Seongyong
School of Electrical & Electronic Eng., Yonsei University
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HONG Hyejeong
School of Electrical & Electronic Eng., Yonsei University
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KIM HyunJin
School of Electrical & Electronic Eng., Yonsei University
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AHN Jin-Ho
Dep. of Electronic Eng., Hoseo University
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BAEK Dongmyong
Next Generation Ethernet Research Team, ETRI
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KANG Sungho
School of Electrical & Electronic Eng., Yonsei University
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Ahn Seongyong
School Of Electrical & Electronic Eng. Yonsei University
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Park Hyuntae
Dept. Of Electrical And Electronic Eng. Yonsei Univ.
著作論文
- A Fast IP Address Lookup Algorithm Based on Search Space Reduction
- A Memory-Efficient Pattern Matching with Hardware-Based Bit-Split String Matchers for Deep Packet Inspection
- A Pattern Partitioning Algorithm for Memory-Efficient Parallel String Matching in Deep Packet Inspection
- A Hardware-Efficient Pattern Matching Architecture Using Process Element Tree for Deep Packet Inspection
- A memory-efficient heterogeneous parallel pattern matching scheme in deep packet inspection