Hong Hyejeong | Dept. Of Electrical And Electronic Eng. Yonsei Univ.

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概要

• HONG Hyejeongの詳細を見る
• 同名の論文著者
• Dept. Of Electrical And Electronic Eng. Yonsei Univ.の論文著者

関連著者

• Hong Hyejeong

  Dept. Of Electrical And Electronic Eng. Yonsei Univ.

• Kang Sungho

  Dept. Of Electrical And Electronic Eng. Yonsei University

• Kang Sungho

  Dept. Of Electrical & Electronic Eng. Yonsei University

• BAEK Dongmyoung

  Broadcasting and Telecommunication Convergence Research Laboratory

• Kim Hyunjin

  Dept. Of Electrical And Electronic Eng. Yonsei University

• Hong Hyejeong

  Dept. Of Electrical And Electronic Eng. Yonsei University

• KIM Hyunjin

  Dept. of Electrical and Electronic Eng., Yonsei University

• AHN Jin-Ho

  Dept. of Electronic Eng., Hoseo University

• HONG Hyejeong

  Dept. of Electrical and Electronic Eng., Yonsei University

• Ahn Jin-ho

  Dept. Of Electronic Eng. Hoseo University

• Kim Hyunjin

  Yonsei Univ. Kor

• Kang Sungho

  Dept. Of Electrical And Electronic Eng. Yonsei Univ.

• Baek Dongmyoung

  Broadcasting and Telecommunication Convergence Research Lab.

• Kang Sungho

  Dept. Of Electrical And Electronic Eng. Yonsei Univsersity

• Park Hyuntae

  Dept. Of Electrical And Electronic Eng. Yonsei University

• AHN Seongyong

  School of Electrical & Electronic Eng., Yonsei University

• HONG Hyejeong

  School of Electrical & Electronic Eng., Yonsei University

• KIM HyunJin

  School of Electrical & Electronic Eng., Yonsei University

• AHN Jin-Ho

  Dep. of Electronic Eng., Hoseo University

• BAEK Dongmyong

  Next Generation Ethernet Research Team, ETRI

• KANG Sungho

  School of Electrical & Electronic Eng., Yonsei University

• Ahn Seongyong

  School Of Electrical & Electronic Eng. Yonsei University

• Park Hyuntae

  Dept. Of Electrical And Electronic Eng. Yonsei Univ.

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著作論文

• A Pattern Partitioning Algorithm for Memory-Efficient Parallel String Matching in Deep Packet Inspection
• A Hardware-Efficient Pattern Matching Architecture Using Process Element Tree for Deep Packet Inspection
• An Efficient IP Address Lookup Scheme Using Balanced Binary Search with Minimal Entry and Optimal Prefix Vector
• A memory-efficient heterogeneous parallel pattern matching scheme in deep packet inspection

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