Hu Chenming | Department Of Electrical Engineering & Computer Sciences University Of California
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概要
関連著者
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Hu Chenming
Department Of Electrical Engineering & Computer Sciences University Of California
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YU Bin
Department of Dental Biomaterials Science and Dental Research Institute, School of Dentistry, Seoul
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Hu Chenming
Department Of Electrical Engineering And Computer Science University Of California
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Hu Chenming
Department Of Electrical Engineering And Computer Science University Of California At Berkeley
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Hu Chenming
Department Of Electrical Engineering And Computer Sciences University Of California At Berkeley
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Yu Bin
Department Of Dental Biomaterials Science And Dental Research Institute School Of Dentistry Seoul Na
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Yu Bin
Department Of Electrical Engineering & Computer Sciences University Of California
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KING Tsu-Jae
Department of Electrical Engineering and Computer Science, University of California
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King T‐j
Univ. California At Berkeley Ca Usa
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SUGII Toshihiro
FUJITSU LABORATORIES LTD.
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NODA Kenji
ULSI Systems Development Laboratories, NEC Corporation
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TANAKA Tetsu
Fujitsu Laboratories Ltd.
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Ju Dong-hyuk
Technology Development Group Advanced Micro Devices
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Okumura Tsugunori
Department Of Electrical And Electronic Engineering Graduate School Of Science And Engineering Tokyo
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KEPLER Nick
Technology Development Group, Advanced Micro Devices
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King Tsu-jae
Department Of Electrical Engineering & Computer Sciences University Of California
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Kepler Nick
Technology Development Group Advanced Micro Devices
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Uchida Tetsuya
Ulsi Development Center Mitsubishi Electric Corporation
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Tatsumi Toru
Microelectronics Laboratories Nec Corporation
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Uchida Tetsuya
Ulsi Device Development Laboratories Nec Corporation
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Yu Bin
Department Of Biochemistry And Molecular Biology Michigan State University
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Noda Kenji
Ulsi Device Development Laboratories Nec Corporation
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Hu Chenming
Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA 94720, U.S.A.
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Kamohara Shiro
Yield Management Department, Process Technology Development Division, Renesas Technology Corporation, Hitachinaka, Ibaraki 312-8504, Japan
著作論文
- Impact of Gate Microstructure on Complementary Metal-Oxide-Semiconductor Transistor Performance
- New Method of Extracting Inversion Layer Thickness and Charge Profile and Its Impact on Scaled MOSFETs
- Hot-Carrier Reliability of 0.1μm Delta-Doped MOSFETs
- Deep-Trap Stress Induced Leakage Current Model for Nominal and Weak Oxides
- SOI (Silicon-On-Insulator) for High Speed Ultra Large Scale Integration