HIRABAYASHI Atsuo | Advanced Device Technology Laboratory, Fuji Electric Corporate Research & Development Ltd.

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概要

• 同名の論文著者
• Advanced Device Technology Laboratory, Fuji Electric Corporate Research & Development Ltd.の論文著者

関連著者

• Sumida Hitoshi

  Advanced Device Technology Laboratory Fuji Electric Corporate Research & Development Ltd.

• HIRABAYASHI Atsuo

  Advanced Device Technology Laboratory, Fuji Electric Corporate Research & Development Ltd.

• Sumida Hitoshi

  Advanced Device Technology Laboratory Fuji Electric Corporate R Amp Ltd.

• Hirabayashi Atsuo

  Advanced Device Technology Laboratory Fuji Electric Corporate R Amp Ltd.

• Sumida Hitoshi

  Fuji Electric Co. Ltd.

• Sumida Hitoshi

  Advanced Device Technology Laboratory Fuji Electric Corporate R&d Ltd.

• Sumida H

  Fuji Electric Co. Ltd. Nagano Jpn

• Sumida Hitoshi

  Advanced Device Technology Laboratory Fuji Electric Corporate Research And Development Ltd.

• TAGAMI Saburou

  Matsumoto Factory, Fuji Electric Company, Ltd.

• Hirabayashi Atsuo

  Fuji Electric Co. Ltd.

• Hirabayashi Atsuo

  Advanced Device Technology Laboratory Fuji Electric Corporate Research And Development Ltd.

• Hirabayashi Atsuo

  Advanced Device Technology Laboratory Fuji Electric Corporate R&d Ltd.

• Hirabayashi Atsuo

  Advanced Device Technology Laboratory Fuji Electric Corporate Research & Development Ltd.

• Tagami S

  Matsumoto Factory Fuji Electric Company Ltd.

• Sumida Hitoshi

  Advanced Device Technology Laboratory, Fuji Electric Corporate Research and Development, Ltd.

• SUMIDA Hitoshi

  Advanced Device Technology Laboratory, Fuji Electric Corporate R&D, Ltd.

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著作論文

• Measurements of the Breakdown Voltage of the Lateral Insulated Gate Bipolar Transistor on the Silicon-on-Insulator Film with Varying Implantation Doses for the N-Buffer Layer
• SOI LIGBT Structure with the Collector-Short Region for Improved Latch-Up Performance
• Investigation of Transient Substrate Currents in Lateral Power Devices on Silicon-on-Insulator
• Noise Current Induced by Switching of a Dielectric Isolated Lateral Insulated Gate Bipolar Transistor on Silicon-on-Insulator
• A Lateral Insulated Gate Bipolar Transistor Structure with the Collector-Short Region for Improved Latch-Up Performance
• Measurement of the Breakdown Voltage of Lateral Power Metal-Oxide-Semiconductor Field-Effect-Transistors on a Silicon-on-Insulator Film with Varying the Surface Design around the Gate Region
• Lateral IGBT Structure on the SOI Film with the Collector-Short Region for Improved Blocking Capability

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