LOUBET N. | STMicroelectronics

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著作論文

A Breakthrough Electronic Lithography Process Through Si Layer for Self Aligning Gates in Planar Double-Gate Transistors for 32nm Node And Below
Si_Ge_x/Si Selective Etch with HCl for Thin Si-Channel Transistors Integration
Effect of Process Induced Strain in 35nm FDSOI Devices with Ultra-Thin Silicon Channels
A Novel Self Aligned Design Adapted Gate All Around (SADAGAA) MOSFET including two stacked Channels : A High Co-Integration Potential
Mechanical and Electrical Analysis of Strained Liner Effect in 35 nm Fully Depleted Silicon-on-Insulator Devices with Ultra Thin Silicon Channels

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