MASSON P. | L2MP
スポンサーリンク
概要
関連著者
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LOUBET N.
STMicroelectronics
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POUYDEBASQUE A.
NXP Semiconductors
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WACQUEZ R.
ST Microelectronics
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CORONEL P.
ST Microelectronics
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SAMSON MP.
ST Microelectronics
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DELILLE D.
NXP 850 rue
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LOUBET N.
ST Microelectronics
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BUSTOS J.
ST Microelectronics
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GUILLAUMOT B.
ST Microelectronics
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ERNST T.
CEA/Leti Minatec
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MASSON P.
L2MP
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SKOTNICKI T.
ST Microelectronics
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LEVERD F.
STMicroelectronics
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CLEMENT LR.
NXP 850 rue
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DELAYE V.
CEA/Leti Minatec
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BAUD L.
CEA/Leti Minatec
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POUYDEBASQUE A.
NXP 850 rue
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GOUY JP.
CEA/Leti Minatec
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Borel S.
Leti Rue Des Martyrs
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Fleury D.
St Microelectronics
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Cros A.
St Microelectronics
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CERUTTI R.
ST Microelectronics
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POUYDEBASQUE A.
Philips
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HARRISON S.
Philips
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BOREL S.
LETI, rue des Martyrs
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LENOBLE D.
ST Microelectronics
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DELILLE D.
Philips
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LEVERD F.
ST Microelectronics
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JUDONG F.
ST Microelectronics
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VUILLET N.
ST Microelectronics
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ERNST T.
LETI, rue des Martyrs
著作論文
- A Breakthrough Electronic Lithography Process Through Si Layer for Self Aligning Gates in Planar Double-Gate Transistors for 32nm Node And Below
- A Novel Self Aligned Design Adapted Gate All Around (SADAGAA) MOSFET including two stacked Channels : A High Co-Integration Potential