Inter search mode reduction based parallel propagate partial SAD architecture for variable block size motion estimation in H.264/AVC (第20回 回路とシステム軽井沢ワークショップ論文集) -- (映像応用)
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概要
- 論文の詳細を見る
- [電子情報通信学会]の論文
- 2007-04-23
著者
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HUANG Yiqing
IPS, Waseda University
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SONG Yang
Graduate School of Information, Production and Systems, Waseda University
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Song Yang
Graduate School Of Ips Waseda University
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Liu Zhenyu
Kitakyushu Foundation For The Advancement Of Industry Science And Technology
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Huang Yiqing
Graduate School Of Information Production And System Waseda University
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Liu Zhenyu
Ips Waseda University
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Liu Zhenyu
Tsinghua University
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- BS-12-18 A Novel Hardware-Friendly Regular 3-Step Integer Motion Estimation Algorithm for H.264/AVC(BS-12. Network Planning, Control, and Management)
- A-16-1 Group-Based Prediction Scheme on Multiple Reference Frame Fractional Motion Estimation in H.264/AVC
- Lossless VLSI Oriented Full Computation Reusing Algorithm for H.264/AVC Fractional Motion Estimation(Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)
- D-11-18 An Edge Information Based Block Size Decision Method for Intra Mode Decision in H.264/AVC
- D-11-19 Multi-Stage Based Inter Mode Decision Algorithm in H.264/AVC
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- Lossy Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation(Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)
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- Inter search mode reduction based parallel propagate partial SAD architecture for variable block size motion estimation in H.264/AVC (第20回 回路とシステム軽井沢ワークショップ論文集) -- (映像応用)
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