Design Feasibility of High-Performance Si Wire Gate-All-Around Metal--Oxide--Semiconductor Field-Effect Transistor in Sub-30-nm-Channel Regime
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概要
- 論文の詳細を見る
In this paper we propose a simple model to examine the design feasibility of Si wire gate-all-around (GAA) metal--oxide--semiconductor field-effect transistor (MOSFET) having a sub-30-nm channel. Although the model has one fitting parameter, it successfully reproduces previous simulation results. The practical value of the fitting parameter is examined under physical consideration. It is strongly suggested that the fitting parameter is almost independent of device parameters; thus, the feasibility of the proposed model is verified.
- 2011-01-25
著者
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Omura Yasuhisa
Graduate School Of Eng Kansai University
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Omura Yasuhisa
Graduate School of Science and Engineering, Kansai University, 3-3-35 Yamatecho, Suita, Osaka 564-8680, Japan
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