Dependence of Gate Interfacial Resistance on the Formation of Insulative Boron–Nitride for p-Channel Metal–Oxide–Semiconductor Field-Effect Transistor in Tungsten Dual Polygate Memory Devices

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We investigated the effect of boron at the interface of the diffusion barrier in tungsten polymetal gate stacks on the gate contact interfacial resistance between tungsten and p+ polycrystalline silicon (poly-Si). B–N formation can occur at the bottom of WN, which is a crucial layer for preventing abnormal tungsten silicidation between the tungsten gate electrode and poly-Si. Dissociated nitrogen from the WN layer during postdeposition thermal treatment could easily interact with out-diffused boron, creating an insulating B–N compound layer that could lead a significant increase in gate contact resistance. We varied the types of diffusion barriers (WSix, Ti, TiN, and WN inserted) to investigate the effect of the B–N interlayer on gate contact resistance. The boron concentration at the region of B–N formation is consistent with not only electrically measured gate contact resistance and but also ring oscillator delay characteristics. In the case of the Ti/WN barrier, the TiB2 compound layer existing inside TiSi2 created by the reaction between Ti and p+ poly-Si could behave as efficient buffer layers preventing the out-diffusion of boron during annealing. TiN deposited on the poly-Si induces Si–N interdielectric formation, which also increases gate contact resistance. For the WSix/WN barrier case, additional deposition of an amorphous-Si layer could suppress boron diffusion, but is less effective than the Ti/WN barrier.
2008-04-25