Fabrication and Characterization of Ferroelectric Gate Field-Effect Transistor Memory Based on Ferroelectric–Insulator Interface Conduction

概要

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A new type of ferroelectric gate field-effect transistor (FET) using ferroelectric–insulator interface conduction has been proposed. Drain current flows along the interface between the ferroelectric and insulator layers and requires no semiconductor. The channel region of the FET is composed of a Pt/insulator HfO2/ferroelectric Pb(Zr0.52Ti0.48)O3 (PZT)/Pt/TiO2/SiO2/Si multilayer, and the source and drain areas are formed at the interface of the PZT and HfO2 films. Drain current versus gate voltage characteristics show a clockwise hysteresis loop similar to that for a conventional p-channel transistor. The FET shows that the on/off ratio of the conduction current is within $10^{5}$ to $10^{6}$ and that the off-state current is about $10^{-10}$ A.
Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
2006-11-15