Proposal for a New Ferroelectric Gate Field Effect Transistor Memory Based on Ferroelectric-Insulator Interface Conduction
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概要
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A new type of ferroelectric gate field effect transistor (FET) using ferroelectric-insulator interface conduction has been proposed. Drain current flows along the interface between the ferroelectric and insulator layers and needs no semiconductor. The FET has been fabricated by forming drain and source electrodes on a SiON/Si substrate, depositing SrBi2Ta2O9 (SBT) film, and then forming the gate electrode. Drain current versus gate voltage characteristics show counterclockwise hysteresis loop similarly to the conventional metal-ferroelectric-insulator-semiconductor-FET (MFIS-FET), and the loop is due to polarization hysteresis of the SBT film. The FET shows that 1) the On/Off ratio of the conduction current is 3.8 at 0 bias voltage and 2) the relationship of the conduction current to channel width and length coincides well with the predicted characteristics.
- 2004-04-15
著者
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Noda Minoru
Division Of Advanced Electronics And Optical Science Department Of Systems Innovation Graduate Schoo
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Okuyama Masanori
Division of Advanced Electronics and Optical Science, Department of Systems Innovation, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-cho, Toyonaka City, Osaka 560-8531, Japan
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Okuyama Masanori
Division of Advanced Electrics and Optical Science, Department of Systems Innovation, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-cho, Toyonaka, Osaka 560-8531, Japan
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Hirooka Gen
Division of Advanced Electronics and Optical Science, Department of Systems Innovation, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-cho, Toyonaka City, Osaka 560-8531, Japan
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Noda Minoru
Division of Advanced Electronics and Optical Science, Department of Systems Innovation, Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama-cho, Toyonaka City, Osaka 560-8531, Japan
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