Hysteresis Control of Interface-Engineered Ramp-Edge Junctions for Single-Flux-Quantum Circuits

概要

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We have fabricated interface-engineered junctions (IEJs) with different counterelectrode materials. YbBa2Cu3Ox and La0.2Yb0.9Ba1.9Cu3Ox were used as the upper layer materials, and (La,Sr)2AlTaO6 (LSAT) was deposited on the ramp surface prior to counterelectrode deposition to modify the interface barrier. The junction critical current density was decreased by La-doping and LSAT deposition, though all junctions exhibited resistively and capacitively shunted junction current–voltage ($I$–$V$) characteristics. Furthermore, La-doping and LSAT deposition led to increases in the junction capacitance and hysteresis in the $I$–$V$ characteristics, while $I_{\text{c}}R_{\text{n}}$, $J_{\text{c}}$ spreads, and inductances were almost the same for junctions with similar $J_{\text{c}}$ values.
Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
2004-06-15