Improved Intrinsic Gettering Technique for High-Temperature-Treated CZ Silicon Wafers

スポンサーリンク

概要

• 論文の詳細を見る

• An improved intrinsic gettering (IG) technique for silicon wafers subjected to a high temperature of at least 1200℃ is developed. It has been shown that multi-step annealing from low to high temperatures successively can enhance the IG effectiveness for high-temperature-annealed wafers. Moreover, this technique produces the IG ability even in a low oxygen wafer, ∼11 × 10^<17> cm^<-3>.

• 社団法人応用物理学会の論文
• 1981-01-05

著者

• Tsuya Hideki

  Basic Technology Research Laboratories Nippon Electric Co. Ltd.

• Shimura Fumio

  Basic Technology Research Laboratories Nippon Electric Co. Ltd.

• OGAWA Ken

  Basic Technology Research Laboratories, Nippon Electric Co., Ltd.

• Tsuya H

  Research And Development Center Sitix Division Sumitomo Metal Industries Ltd.

• Ogawa Ken

  Basic Technology Research Laboratories Nippon Electric Co. Ltd.

関連論文

• A New Method for Transmission Electron Microscope Observation of Grown-in Defects in As-Grown Czochralski Silicon (111) Crystals
• Influence of Crystal-Originated "Particle" Microstructure on Silicon Wafers on Gate Oxide Integrity
• Dependence of Grown-in Defect Behavior on Oxygen Concentration in Czoehralski Silicon Crystals
• Formation of Grown-in Defects during Czochralski Silicon Crystal Growth
• Improved Intrinsic Gettering Technique for High-Temperature-Treated CZ Silicon Wafers
• Role of Dislocations in Semi-Insulation Mechanism in Undoped LEC GaAs Crystal

スポンサーリンク