Void-Free Bonded SOI Substrates for High-Voltage, High-Current Vertical DMOS-Type Power ICs
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概要
- 論文の詳細を見る
- 1995-02-28
著者
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KIKUCHI Hiroaki
ULSI Device Development Laboratories, NEC Corporation
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Kobayashi Kenya
Semiconductor Division Nec Corporation
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Arai Kenichi
Ulsi Device Development Laboratories Nec Corporation
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Kikuchi Hiroaki
Ulsi Device Development Laboratory Nec Corporation
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Hamajima Tomohiro
ULSI Device Development Laboratories, NEC Corporation
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Okonogi Kensuke
ULSI Device Development Laboratories, NEC Corporation
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Ninomiya Yasuhito
Semiconductor Division, NEC Corporation
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Takahashi Mitsuasa
Semiconductor Division, NEC Corporation
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Okonogi Kensuke
Ulsi Device Development Laboratories Nec Corporation
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Hamajima Tomohiro
Ulsi Device Development Laboratories Nec Corporation
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Ninomiya Yasuhito
Semiconductor Division Nec Corporation
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Takahashi Mitsuasa
Semiconductor Division Nec Corporation
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Kikuchi Hiroaki
Ulsi Device Development Laboratories Nec Corporation
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Arai Kenichi
ULSI Device Development Laboratories, NEC Corporation
関連論文
- Partially Bonded SOI Substrates for Intelligent Power ICs
- Void-Free Bonded SOI Substrates for High-Voltage, High-Current Vertical DMOS-Type Power ICs
- Lateral Diffusion Distance Measurement of 40-80 nm Junctions by Etching/TEM-Electron Energy Loss Spectroscopy Method
- Two-Dimensional Dopant Profiling of nMOSFETs with Shallow-Extensions Using Electrochemical Etching Technique
- Partially Bonded Silicon on Insulator Substrates for Intelligent Power ICs