DLTS Studies on InSb P-N^+ Diodes
スポンサーリンク
概要
- 論文の詳細を見る
DLTS of Si ion implanted planar and mesa type InSb P-N^+ diodes has been studied over a temperature range 50-130 K using a lock-in amplifier. No electron trap was observed regardless of bias pulse conditions. A hole trap at 95 meV above the valence band was discovered. Its concentrations are 2×10^<13> cm^<-3> for the planar diode annealed at 200℃ and 3×10^<12> cm^<-3> for the mesa diode annealed at 300℃. These values are considerably smaller than those of the electron traps at 0.12 eV above the valence band in as grown crystals reported by Laff and Fan and Hollis et al.
- 社団法人応用物理学会の論文
- 1982-08-20
著者
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Tsukioka Kunio
Department Of Electronics Engineering Tamagawa University
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Tsukioka Kunio
Department Of Electronics Tamagawa University
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MIYAZAWA Hisao
Department of Electronics, Tamagawa University
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Miyazawa Hisao
Department Of Electronics Tamagawa University
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Tsukioka Kunio
Department of Electronic Engineering, Faculty of Engineering, Tamagawa University, 6-1-1 Tamagawa Gakuen, Machida, Tokyo 194-8610, Japan
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