Advanced α-Si TFT Process Integration & Pixel Architecture (情報ディスプレイ--The 6th Asian Symposium on Information Display & Exhibition)

概要

論文の詳細を見る
At present, the a-Si thin film transistor(TFT)mass production process line usually have six(even more)photolithography process. Considering from the cost, it is believed that reduce the photolithography process will put it in a better position for competition. In this work, many advanced reduced mask a-Si TFT array process have been studied and analyzed their characteristics including TFT performance, process window, etc. Results showing here indicate that a 5-mask TFT manufacturing process can be optimized with low cost, high production yield and high performance. Moreover, an a-Si TFT with four photolithography process only has been developed and studied. And a two-step-exposure(TSE)technology was developed in application for process reduction. These properties let this reduced mask TFT array process reveal a much higher potential in mass production.
社団法人映像情報メディア学会の論文
2000-10-20