43.1: Invited Paper : Active-Matrix Field-Emitter Arrays for the Next-Generation FEDs(2.主なFED関連発表内容)(Report on 1999 SID International Symposium)
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概要
- 論文の詳細を見る
- 社団法人映像情報メディア学会の論文
- 1999-07-02
著者
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Kanemaru S.
Nanoelectronics Research Institute Aist
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Matsukawa T.
Nanoelectronics Research Institiute Aist
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MATSUKAWA T.
Electrotechnical Laboratory
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KANEMARU S.
Electrotechnical Laboratory
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ITOH J.
Electrotechnical Laboratory
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Matsukawa T.
Nanoelectronics Research Institute National Institute Of Advanced Industrial Science And Technology
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- Ta/Mo Stack Dual Metal Gate Technology Applicable to Gate-First Processes
- Carrier Mobility in Multi-FinFETs with a (111) Channel Surface Fabricated by Orientation-Dependent Wet Etching
- Investigation of Accumulation-mode Vertical Double-gate MOSFET
- Device Design Consideration for Four-terminal Double-gate MOSFET (4T-DGFET)
- Work function control of Al-Ni alloy for metal gate application
- Charging Damage of SOI Wafer Diagnosed by Scanning Maxwell-Stress Microscopy
- 43.1: Invited Paper : Active-Matrix Field-Emitter Arrays for the Next-Generation FEDs(2.主なFED関連発表内容)(Report on 1999 SID International Symposium)
- Dopant Profiling in Vertical Ultrathin Channel for Double-gate MOSFET by Scanning Nonlinear Dielectric Microscopy (SNDM)
- Simple Process for Buried Nanopyramid Array (BNPA) Fabrication by Means of Dopant Ion Implantation and Dual Wet Etching