A Cost-Effective Handshake Protocol and Its Implementation for Bundled-Data Asynchronous Circuits(VLSI Design Technology and CAD)
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概要
- 論文の詳細を見る
We propose and implement a four-phase handshake protocol for bundled-data asynchronous circuits with consideration given to power consumption and area. A key aspect is that our protocol uses three phases for generating the matched delay to signal the completion of the data-path stage operation whereas conventional methods use only one phase. A comparison with other protocols at 0.18μm process showed that our protocol realized lower power consumption than any other protocol at cycle times of 1.2 ns or more. The area of the delay generator required for a given data-path delay was less than half that of other protocols. The overhead of the timing generator was the same as or less than that of other protocols.
- 社団法人電子情報通信学会の論文
- 2006-01-01
著者
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Abe Koki
Univ. Electro‐communications Tokyo Jpn
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Abe Koki
Department Of Computer Science
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Shimizu Masakazu
Department Of Computer Science The University Of Electro-communications
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Shimizu Masakazu
Department Of Analytical Life Institute Of Pharmaceutical Sciences Hiroshima University
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