An Implementation of 16-bit Syndrome Calculators
スポンサーリンク
概要
- 論文の詳細を見る
In this paper, we consider the 16-bit syndrome calculators for the ATM interface system. Thanks to both of the parallelism of the linear-feedback-shift-register and the property of Galois field, it has low latency, less hardware complexity and high throughput.
- 社団法人電子情報通信学会の論文
- 1997-07-24
著者
-
Kim Kyung-Soo
Semiconductor Technology Division, ETRI
-
Kim Kyung-soo
Semiconductor Div. Electronics And Telecommunications Research Institute
-
Kim Kyung-soo
Semiconductor Technology Division Etri
-
Suh Chung-Wook
Semiconductor Technology Division, ETRI
-
Suh Chung-wook
Semiconductor Technology Division Etri
関連論文
- Implementation of 155.52Mbps Physical Layer Processor for ATM Applications
- Implementation of 155.52Mbps Physical Layer Processor for ATM Applications
- A 3.3 V 0.8 μm CMOS IF IC for CDMA/FM Cellular Phone
- A 3.3 V 0.8 μm CMOS IF IC for CDMA/FM Cellular Phone
- An Implementation of 16-bit Syndrome Calculators
- Recovery of Silicon Surface after Reactive Ion Etching of SiO_2 using CHF_3/C_2F_6 Plasma
- Implementation of Modem ASIC for CDMA/FM dual-mode Cellular Mobile Phone
- Implementation of Modem ASIC for CDMA/FM dual-mode Cellular Mobile Phone
- An Implementation of 16-bit Syndrome Calculators