Improved Forward Test Generation of Sequential Circuits Using Variable-Length Time Frames (Special Issue on VLSI Testing and Testable Design)

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概要

• 論文の詳細を見る

• In our recent work, a forward test generation method for sequential circuits by using a single time frame was proposed. In order to improve the effectiveness of the method, we introduced an extended mode which can handle the two time frames for a hard-to-test fault and a state escaping phase which can detect a sequence of unsuitable states for test generation. The experimental results show that the improved method is effective in generating higher coverage tests with a small number of tests.

• 社団法人電子情報通信学会の論文
• 1993-07-25

著者

• Takamatsu Yuzo

  Faculty Of Engineering Ehime University

• TAKAHASHI Hiroshi

  Faculty of Fisheries, Hokkaido University

• Ogawa Taijiro

  Faculty of Engineering, Ehime University

• Ogawa Taijiro

  Faculty Of Engineering Ehime University

• Takahashi Hiroshi

  Faculty Of Engineering Ehime University

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• Improved Forward Test Generation of Sequential Circuits Using Variable-Length Time Frames (Special Issue on VLSI Testing and Testable Design)
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