Dynamic Power Dissipation of Track / Hold Circuit

スポンサーリンク

概要

• 論文の詳細を見る

• This paper describes the formula for dynamic power dissipation of a track/hold circuit as a function of the input frequency, the input amplitude, the sampling frequency, the track / hold duty cycle, the power supply voltage and the hold capacitance for a sinusoidal input.

• 社団法人電子情報通信学会の論文
• 2000-08-25

著者

• Kobayashi Haruo

  The Department Of Electrical Engineering Tokyo Metropolitan College Of Technology

• Sato Hiroyuki

  The Department Of Electronic Engineering Faculty Of Engineering Gunma University

関連論文

• A High-Speed 6-Bit ADC Using SiGe HBT
• Track/Hold Circuit in GaAs HBT Process (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems)
• Modeling and Parameter Extraction Technique for Uni-Directional HV MOS Devices (Special Section of Selected Papers from the 12th Workshop on Circuit and Systems in Karuizawa)
• A Method of Extracting Embedded Binary Data from JPEG Bitstreams Using Standard JPEG Decoder(Special Section on Digital Signal Processing)
• A Method of Inserting Binary Data into MPEG Video in the Compressed Domain (Special Section on Digital Signal Processing)
• A Practical Analog BIST Cooperated with an LSI Tester( Analog Circuit Techniques and Related Topics)
• High-Efficiency Charge-Pump Circuits with Large Current Output for Mobile Equipment Applications
• Input-Dependent Sampling-Time Error Effects Due to Finite Clock Slope in MOS Samplers(Analog Circuit and Device Technologies)
• Dynamic Power Dissipation of Track / Hold Circuit

スポンサーリンク