RHINE: Reconfigurable Multiprocessor System for Video CODEC (Special Section on JTC-CSCC '92)
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概要
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This paper introduces the new application specific architecture RHINE (Reconfigurable Hierarchical Image Neo-multiprocessor Engine) that is a multiprocessor system for moving picture CODEC. The array processor is known to be originally suited for data parallel processing such as image signal processing which requires vast amount of computations and has the identical instruction sequences on data. However, the moving picture CODEC algorithm suffers from the large load imbalance in the processings on multi-processors with the separated sub-images. Some load balancing techniques are indispensable in such applications for the highest speed-up. RHINE gives one of the optimal solutions for such a load balancing due to its feature of the self reconfigurable architecture. RHINE consists of Block Processing Units (BPU) hierarchically, in each of which has a common bus architecture of multiprocessors with a block memory. Processors in a BPU move to the other BPU according to the load imbalance between BPUs by switching the bus connection between BPUs. The advantage of RHINE architecture is demonstrated by showing performance simulations for real moving pictures.
- 社団法人電子情報通信学会の論文
- 1993-06-25
著者
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Kunieda Hiroaki
The Faculty Of Engineering Tokyo Institute Of Technology
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Huang Zhao-chen
The Faculty Of Engineering Tokyo Institute Of Technology
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Takeuchi Yoshinori
the Faculty of Technology, Tokyo University of Agriculture and Technology
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Saeki Masatomo
the Faculty of Engineering, Tokyo Institute of Technology
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Takeuchi Yoshinori
The Faculty Of Engineering Tokyo University Of Agriculture And Technology
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Saeki Masatomo
The Faculty Of Engineering Tokyo Institute Of Technology
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