An Area-Effective Datapath Architecture for Embedded Microprocessors and Scalable Systems
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概要
- 論文の詳細を見る
We have proposed area-reduction techniques for superscalar datapath architectures with 34 SIMD instructions and have developed an integer-media unit based on these techniques. The unit's design is both functionally asymmetrical and integer-SIMD unified, and the resulting savings in area are 27%-48% as compared to other, functionally equivalent mid-level microprocessor designs, with performance that is, at most, only 7.2% lower. Further, in 2-D IDCT processing, the unit outperforms embedded microprocessor designs without SIMD functions by 49%-118%. Specifically, effective area reduction of adders, shifters, and multiply-and-adders has been achieved by using the unified design. These area-effective techniques are useful for embedded microprocessors and scalable systems that employ highly parallel superscalar and on-chip parallel architectures. The integer-media unit has been implemented in an evaluation chip fabricated with 0.15-μm 5-metal CMOS technology.
- 社団法人電子情報通信学会の論文
- 2001-08-01
著者
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Manabe Takashi
R & D Planning And Technical Service Division Nec Corporation
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Yamashina Masakazu
The Authors Are With Silicon Systems Research Laboratories Nec Corporation
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Yamashina Masakazu
The Authors Are With Silicon Systems Research Laboratories System Devices And Fundamental Research N
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Nishi Naoki
The Authors Are With Silicon Systems Research Laboratories System Devices And Fundamental Research N
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INOUE Toshiaki
The authors are with Silicon Systems Research Laboratories, System Devices and Fundamental Research,
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MANABE Takashi
The author is with Production Techndogy Laboratories, Prototype Engineering Center, NEC Corporation
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TORII Sunao
The authors are with Silicon Systems Research Laboratories, System Devices and Fundamental Research,
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MATSUSHITA Satoshi
The authors are with Silicon Systems Research Laboratories, System Devices and Fundamental Research,
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EDAHIRO Masato
The authors are with Silicon Systems Research Laboratories, System Devices and Fundamental Research,
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Torii Sunao
The Authors Are With Silicon Systems Research Laboratories System Devices And Fundamental Research N
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Edahiro Masato
The Authors Are With Silicon Systems Research Laboratories System Devices And Fundamental Research N
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Manabe Takashi
The Author Is With Production Techndogy Laboratories Prototype Engineering Center Nec Corporation
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Inoue Toshiaki
The Authors Are With Silicon Systems Research Laboratories System Devices And Fundamental Research N
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Matsushita Satoshi
The Authors Are With Silicon Systems Research Laboratories System Devices And Fundamental Research N
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