Review of Device Technologies of Flash Memories(Special Issue on Nonvolatile Memories)
スポンサーリンク
概要
- 論文の詳細を見る
This paper reviews device technologies of flash memories, whose market has grown explosively due to the advantages of:(1)their low cost provided by availability of the single-transistor type cell with adoption of block-erase operation;(2)high functionality as electrically erasable and programmable non-volatile memories;and (3)high reliability with the mature floating gate technology. As for fast-random-access flash memories, their scaling issue, including a multi-level-cell technology, is discussed, and technologies for low power consumption, which is highly demanded for mobile electronic equipment, their major application, are described. Furthermore, device technologies of serial-access flash memories, which have achieved low cost with cell-size reduction, are also reviewed. Finally, a future promising technology of the NROM concept, wich achieves a multi-storage-cell with low voltage operation and a simple process, is introduced.
- 社団法人電子情報通信学会の論文
- 2001-06-01
著者
-
Ohnakado Takahiro
Advanced Technology R&d Center Mitsubishi Electric Corporation
-
Ajika N
Memory Ic Division Mitsubishi Electric Corporation
-
AJIKA Natsuo
Memory IC Division, Mitsubishi Electric Corporation
関連論文
- Optimization of Nitridation and Reoxidation Conditions for EEPROM^* Tunneling Dielectric
- A High Density High Performance Cell for 4M Bit Full Feature Electrically Erasable/Programmable Read-Only Memory
- Improved Array Architectures of DINOR for 0.5 μm 32 M and 64 Mbit Flash Memories (Special Section on High Speed and High Density Multi Functional LSI Memories)
- Memory Array Architecture and Decoding Scheme for 3 V Only Sector Erasable DINOR Flash Memory (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
- Review of Device Technologies of Flash Memories(Special Issue on Nonvolatile Memories)
- P-channel DINOR Flash Memory with Band-to-Band Tunneling Induced Hot Electron Programming
- An Electrostatic-Discharge (ESD) Protection Device with Low Parasitic Capacitance Utilizing a Depletion-Layer-Extended Transistor (DET) for RF CMOS ICs