An 8 Bit Current-Mode CMOS A/D Converter with Three Level Folding Amplifiers (Srecial Section on Analong Circuit Tectningues in the Digital-oriented Era)

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概要

• 論文の詳細を見る

• An 8 bit current-mode folding and interpolation analog to digital converter (ADC) with three-level folding amplifiers is proposed in this paper. A current-mode three-level folding amplifier is employed not only to reduce the number of reference current sources, but also to decrease a power dissipation within the ADC. The designed ADC fabricated by a 0.8 μm n-well CMOS double metal/single poly process occupies the chip area of 2.2 mm × 1.6 mm. The experimental result shows the power dissipation of 33.6 mW with a power supply of 5V.

• 社団法人電子情報通信学会の論文
• 1998-02-25

著者

• YOON Kwang

  the Department of Electronic Engineering, Inha University

• Yoon Kwang

  The Department Of Electronic Engineering Inha University

• KIM Kyung-Myun

  the analog group division, LG Semiconductor Co.

• Kim Kyung-myun

  The Analog Group Division Lg Semiconductor Co.

関連論文

• A 3V-30 MHz Analog CMOS Current-Mode Bandwidth Programmable Integrator (Special Section on VLSI Design and CAD Algorithms)
• A 3.3V CMOS PLL with a Self-Feedback VCO (Special Section on VLSI Design and CAD Algorithms)
• A 3.3V CMOS Dual-Looped PLL with a Current-Pumping Algorithm(Special Section on Analog Circuit Techniques and Related Topics)
• A Current-Mode Folding/Interpolating CMOS A/D Converter with Multiplied Folding Amplifiers(Special Section on Analog Circuit Techniques Supporting the System LSI Era)
• An 8 Bit Current-Mode CMOS A/D Converter with Three Level Folding Amplifiers (Srecial Section on Analong Circuit Tectningues in the Digital-oriented Era)

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