Inverter Reduction Algorithm for Super Fine-Grain Parallel Processing (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems)

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概要

• 論文の詳細を見る

• We are working on an algorithm to optimize the logic circuits that can be realized on the super fine-grain parallel processing architecture. As a part of this work, we have developed an inverter reduction algorithm. This algorithm is based on modeling logic circuits as dynamical systems. We implement the algorithm in the PARTHENON system, which is the high level synthesis system developed in NTT's laboratories, and evaluate it using ISCAS85 benchmarks. We also compare the results with both the existing algorithm of PARTHENON and the algorithm of Jain and Bryant.

• 社団法人電子情報通信学会の論文
• 1997-03-25

著者

• Ito Hideyuki

  Ntt Network Innovation Laboratories Ntt Corporation

• Oguri K

  Ntt Communications And Information Lab. Yokosuka‐shi Jpn

• Nakamura Y

  Kyoto Univ. Kyoto‐shi Jpn

• SHIOZAWA Tsunemichi

  NTT Network Innovation Laboratories

• NAGAMI Kouichi

  NTT Network Innovation Laboratories

• ITO Hideyuki

  NTT Information and Communication Systems Laboratories

• NAGAMI Kouichi

  NTT Information and Communication Systems Laboratories

• SHIOZAWA Tsunemichi

  NTT Information and Communication Systems Laboratories

• OGURI Kiyoshi

  NTT Information and Communication Systems Laboratories

• NAKAMURA Yukihiro

  NTT Information and Communication Systems Laboratories

• Ito Hideyuki

  Ntt Network Innovation Laboratories

関連論文

• Dynamically Reconfigurable Logic LSI : PCA-2(Recornfigurable Systems)(Reconfigurable Systems)
• Dynamically Reconfigurable Logic LSI : PCA-1 : The First Realization of the Plastic Cell Architecture
• A Method of Mapping Finite State Machine into PCA Plastic Parts(Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa)
• Programmable Dataflow Computing on PCA (Special Section on VLSI Design and CAD Algorithms)
• Magnetic Properties of Nonequilibrium Fe-Cu-Ag Alloys Produced by Vapor Quenching
• High-Level Synthesis Design at NTT Systems Labs (Special Issue on Synthesis and Verification of Hardware Design)
• An Architecture of a Specification Design Expert System
• Plastic Cell Architecture : A Scalable Device Architecture for General-Purpose Reconfigurable Computing(Special Issue on Novel VLSI Processor Architectures)
• Inverter Reduction Algorithm for Super Fine-Grain Parallel Processing (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems)

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