Design Verification Based on Theorem-Proving Technique for Sequential Control Circuits with Timing Coordination
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概要
- 論文の詳細を見る
A design verification method for sequential control circuits with timing coordination has been developed. Unlike prevailing numeric simulations, this method is based on a theorem-proving technique. Sequential control circuits realize their target functions by coordinating the asynchronously inputted signals. In drder to verify timing coordination efficiently, the control strategy which combines hyperresolution and a connection graph method with attached procedures for handling time variables symbolically has been developed. This method facilitates not only the verification of timing coordination but also the extraction of intended behaviours from proposed designs. The developed method was applied to verificauon of an auto-recloslng crrcurt In an electnc power substation which contains about 40 components. The verification for each specification was executed correctly in about I minute on a mainframe computer. The developed verification method was udged to be useful and efficient for practical use.
- 一般社団法人情報処理学会の論文
- 1994-12-15
著者
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MATSUDA Satoshi
Department of Ophthalmology, University of Tokushima School of Medicine
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Ito J
Laboratory Of Biochemistry Sagami Women's University
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Yamada N
Energy Research Laboratory Hitachi Ltd.
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Ueda Yoshikatsu
Systems Engineering Division Hitachi Ltd.
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Nakamura Tomoharu
Kokubu Works Hitachi Ltd.
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Matsuda S
Kyoto Univ. Kyoto Jpn
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Yamada Naoyuki
Energy Research Laboratory, Hitachi, Ltd.
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Ito Junko
Systems Engineering Division, Hitachi, Ltd.
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Yoshizawa Junichi
Computer & Communication Research Center, The Tokyo Electric Power Co.
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Mastuda Satoshi
Computer & Communication Research Center, The Tokyo Electric Power Co.
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Yamada Naoyuki
Energy Research Laboratory Hitachi Ltd.
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Yoshizawa Junichi
Computer & Communication Research Center The Tokyo Electric Power Co.
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ITO JUNKO
Faculty of Pharmacy, Meijo University
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