Junction Depth Dependence of the Gate Induced Drain Leakage in Shallow Junction Source/Drain-Extension Nano-CMOS

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概要

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• This study describes the dependence of the surface electric field to the junction depth of source/drain-extension, and the suppression of gate induced drain leakage (GIDL) in fully depleted shallow junction gate-overlapped source/drain-extension (SDE). The GIDL can be reduced by reducing shallow junction depth of drain-extension. Total space charges are a function of junction depth in fully depleted shallow junction drain-extension, and the surface potential is proportional to these charges. Because the GIDL is proportional to surface potential, GIDL is the function of junction depth in fully depleted shallow junction drain-extension. Therefore, the GIDL is suppressed in a fully depleted shallow junction drain-extension by reducing surface potential. Negative substrate bias and halo doping could suppress the GIDL, too. The GIDL characteristic under negative substrate bias is contrary to other GIDL models.

• （社）電子情報通信学会の論文
• 2008-05-01

著者

• Jung Sung-woo

  National Center For Nanomaterials Technology (ncnt)

• Kim Jae-chul

  Dept. Of Electronic And Electrical Engineering Pohang University Of Science And Technology

• Jeong Yoon-Ha

  Dept. of Electronic and Electrical Engineering, Pohang University of Science and Technology

• Song Seung-hyun

  Dept. Of Electronic And Electrical Engineering Pohang University Of Science And Technology

• Jeong Yoon-ha

  Dept. Of Electronic And Electrical Engineering Pohang University Of Science And Technology

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• Junction Depth Dependence of the Gate Induced Drain Leakage in Shallow Junction Source/Drain-Extension Nano-CMOS
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