Impact of Vth interference suppression using a novel Poly Si shield on FLASH memories

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概要

• 論文の詳細を見る
• 2005-09-13

著者

• Ohji Y.

  Renesas Technology Corp. Wafer Process Engineering Development Dept.

• Fukumura T.

  Renesas Technology Corp.

• OHTA F.

  Renesas Technology Corp.

• YOSHITAKE T.

  Renesas Technology Corp.

• SHIMIZU S.

  Renesas Technology Corp.

• IKEDA Y.

  Renesas Technology Corp.

• SHIMIZU M.

  Renesas Technology Corp.

• TSUCHIYA O.

  Renesas Technology Corp.

• FUJINAGA M.

  Renesas Technology Corp.

• ISHIKAWA K.

  Renesas Technology Corp.

• FUKASAWA A.

  Renesas Technology Corp.

• HIRAO K.

  Renesas Technology Corp.

• Ohji Y.

  Renesas Technology Corp.

関連論文

• An Advanced Air Gap Process for MLC flash memories reducing Vth interference and realizing high reliability
• A Novel STI Process from the View Point of Total Strain Process Design for 45nm Node Devices and Beyond
• Suppression of Boron Penetration from S/D Extension to improve Gate Leakage Characteristics and Gate-Oxide Reliability for 65nm node CMOS and beyond
• Impact of Vth interference suppression using a novel Poly Si shield on FLASH memories
• Three-Dimensional Electro-Thermal Compact Model for Reset Operation of Phase Change Memories

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