A 1.2V Rail-to-Rail Analog CMOS Rank Filter
スポンサーリンク
概要
- 論文の詳細を見る
- 1999-05-05
著者
-
LIU Bin-Da
Department of Electrical Engineering, National Cheng Kung University
-
Liu Bin-da
Department Of Electrical Engineering National Cheng Kung University
-
HUNG Yu-Cherng
Department of Electrical Engineering, National Cheng Kung University
-
Hung Yu-cherng
Department Of Electrical Engineering National Cheng Kung University
関連論文
- A Versatile Step-Up/Step-Down Switched-Capacitor-Based DC-DC Converter
- A 0.8-V 250-MSample/s Double-Sampled Inverse-Flip-Around Sample-and-Hold Circuit Based on Switched-Opamp Architecture
- Low-Power Circuit Techniques for Low-Voltage Pipelined ADCs Based on Switched-Opamp Architecture
- Coefficients Generation for the 4th-Order Leapfrog Sigma-Delta A/D Converters (Analog Signal Processing)
- A 1.2V Rail-to-Rail Analog CMOS Rank Filter
- A Third-Order Low-Distortion Delta-Sigma Modulator with Opamp Sharing and Relaxed Feedback Path Timing
- An Analog CMOS Rank-Order Extractor with O(N) Complexity Using Maximum/Winner-Take-All Circuit(Integrated Electronics)