スポンサーリンク
Research Department 1, Semiconductor Leading Edge Technologies, Inc. | 論文
- Hf and N Release from HfSiON in High-Temperature Annealing Induced by Oxygen Incorporation
- Production-Worthy HfSiON Gate Dielectric Fabrication Enabling EOT Scalability Down to 0.86nm and Excellent Reliability by Polyatomic Layer Chemical Vapor Deposition Technique
- Gate-Last MISFET Structures and Process for Characterization of High-k and Metal Gate MISFETs(Microelectronic Test Structures)
- Area Selective Flash Lamp Post-Deposition Annealing of High-k Film Using Si Photo Absorber for Metal Gate MISFETs with NiSi Source/Drain
- Extended Scalability of HfON/SiON Gate Stack Down to 0.57 nm Equivalent Oxide Thickness with High Carrier Mobility by Post-Deposition Annealing
- Interfacial Reaction of TiN/HfSiON Gate Stack in High-Temperature Annealing for Gate-First Metal–Oxide–Semiconductor Field-Effect Transistors
- Area-Selective Post-Deposition Annealing Process Using Flash Lamp and Si Photoenergy Absorber for Metal/High-$k$ Gate Metal–Insulator–Semiconductor Field-Effect Transistors with NiSi Source/Drain