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Matsushita Electric Industrial Co., Ltd. | 論文
- A Study of a Laminated Band Elimination Filter Comprising Coupled-Line Resonators Using Low Temperature Co-Fired Ceramics (Special Issue on Microwave and Millimeter Wave Technology)
- Properties of Solder Joints Using Sn-Ag-Bi-In Solder
- Enhancement of crystal growth rate of Bio-Nano Crystallization by Pulsed Rapid Thermal Annealing
- Lower Temperature Deposition of Polycrystalline Silicon Films from a Modified Inductively Coupled Silane Plasma
- Plane-Strain Fracture Toughness on Thin AZ31 Wrought Magnesium Alloy Sheets
- F-024 Using CLIPS and C++ to Realize the Rule-based Reasoning in Computer Animation Creation
- 映画ルールベース推論機構による知的なコンピュータ映像制作システム
- An Image Completion Algorithm Using Occlusion-Free Images from Internet Photo Sharing Sites
- 0.3-1.5V Embedded SRAM Core with Write-Replica Circuit Using Asymmetrical Memory Cell and Source-Level-Adjusted Direct-Sense-Amplifier(Memory, Low-Power LSI and Low-Power IP)
- Separation of Metal from Metal-Plated Plastic by Pulsed Power
- M-10 An Adaptive Scheduling Algorithm for On-Demand Video Delivery System
- Active Video Delivery for a Large-Scale Video Archival and Retrieval System
- Active Video Delivery for a Large-Scale Video Archival and Retrieval System
- An Asymptotically Zero Power Charge-Recycling Bus Architecture for Battery-Operated Ultrahigh Data Rate ULSI's(Special Issue on the 1994 VLSI Circuits Symposium)
- A Low Power Bus Architecture with Local and Global Charge-Recycling Bus Techniques for Battery-Operated Ultra-High Data Rate ULSI's
- High-Speed Circuit Techniques for Battery-Operated 16 Mbit CMOS DRAM (Special Section on High Speed and High Density Multi Functional LSI Memories)
- 圧電セラミックス複合構造制御・設計技術の開発
- Liquid Holdup and Liquid-to-Particle Mass Transfer for Gas Continuous Two-Phase Flow in Packed Beds
- TCP Congestion Control Mechanisms for Achieving Predictable Throughput Using Inline Network Measurement
- A Rewritable CMOS-FUSE for System-on-Chip with a Defferential Cell Architecture in a 0.13μm CMOS Logic Process(CMOS Fuse)(New Era of Nonvolatile Memories)