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Kyushu | 論文
- Improving Performance and Energy Saving in a Reconfigurable Processor via Accelerating Control Data Flow Graphs
- メモリアクセスの特徴を活用した高速かつ正確なメモリアーキテクチャ・シミュレーション法(プロセッサシミュレーション)
- A method of FIR filter coefficient menory reduction using characteristic function model
- A method of FIR filter coefficient memory reduction using characteristic function model
- Technology Mapping Technique for Increasing Throughput of Character Projection Lithography(Lithography-Related Techniques,Fundamentals and Applications of Advanced Semiconductor Devices)
- Cell Library Development Methodology for Throughput Enhancement of Character Projection Equipment (CAD, VLSI Design Technology in the Sub-100nm Era)
- Test Architecture Optimization for System-on-a-Chip under Floorplanning Constraints(Test)(VLSI Design and CAD Algorithms)
- A front-end for better behavioral synthesis
- A front-end for better behavioral synthesis
- Developing an architecture for a single-flux quantum based reconfigurable accelerator (集積回路)
- Rapid Design Space Exploration of a Reconfigurable Instruction-Set Processor
- A Reconfigurable Functional Unit with Conditional Execution for Multi-Exit Custom Instructions
- Temperature-Aware Configurable Cache to Reduce Energy in Embedded Systems
- A hybrid design space exploration approach for a coarse-grained reconfigurable accelerator (システムLSI設計技術)
- A hybrid design space exploration approach for a coarse-grained reconfigurable accelerator (VLSI設計技術)
- A hybrid design space exploration approach for a coarse-grained reconfigurable accelerator (コンピュータシステム)
- A hybrid design space exploration approach for a coarse-grained reconfigurable accelerator (リコンフィギャラブルシステム)
- データ値の局所性を利用したライン共有キャッシュの提案
- パケットペーシングを用いた集団通信アルゴリズムのシミュレーション評価
- 稼働コア数制限に基づくマルチコア・プロセッサ性能向上手法の提案