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Integrated Research Institute Tokyo Institute Of Technology | 論文
- Equivalent Circuit Model for On-Chip Variable Inductor
- Chip-Level Performance Maximization Using ASIS (Application-Specific Interconnect Structure) Wiring Design Concept for 45nm CMOS Generation(Device,Low-Power, High-Speed LSIs and Related Technologies)
- A Novel Method for Improving Overload Capability of Stand-alone Power System Based on a Flywheel Induction Motor
- Design of On-Chip High Speed Interconnect on Complementary Metal Oxide Semiconductor 180 nm Technology
- Linear Time Calculation of On-Chip Power Distribution Network Capacitance Considering State-Dependence
- Temperature-Dependent Change of Extraction Performance of Soft Cadmium(II) Ion with TPEN-NIPA Gel. Studies on the Effect of the Ethylenediamine Skeleton
- Small Heat Shock Protein of a Hyperthermophilic Archaeum, Thermococcus sp.Strain KS-1, Exists as a Spherical 24 mer and Its Expression Is Highly Induced under Heat-Stress Conditions
- A Model with Grand Unification Scale of 10^GeV
- RF CMOS Integrated Circuit : History, Current Status and Future Prospects
- Thermoresponsive extraction of cadmium(II) ions by poly(TPEN-NIPA) gels. Effect of chain length and branched spacer structure on gel formation and extraction behavior
- RF Signal Generator Based on Time-to-Analog Converter in 0.18 μm Complementary Metal Oxide Semiconductor
- On-Chip Yagi–Uda Antenna for Horizontal Wireless Signal Transmission in Stacked Multi Chip Packaging
- Radio Frequency Micro Electro Mechanical Systems Inductor Configurations for Achieving Large Inductance Variations and High $Q$-factors
- Optimization Methodology of Layer Numbers with Circuit/Process Co-Design
- Physical design challenges to nano-CMOS circuits