スポンサーリンク
Department of Communications and Computer Engineering, Kyoto University | 論文
- A Performance Prediction of Clock Generation PLLs : A Ring Oscillator Based PLL and an LC Oscillator Based PLL(Integrated Electronics)
- A Power and Delay Optimization Method Using Input Reordering in Cell-Based CMOS Circuits
- High-resolution real-time three-dimensional acoustic imaging system with a reflector
- Extragonadal germ cell tumor of the prostate associated with Klinefelter's syndrome
- Development of procedure for modeling MOSFET compatible with ITRS: noise and 1-5 characteristics modeling for RF/analog MOSFET (集積回路)
- BS-6-3 Development of a Multistatic Atmospheric Radar with Digital Receiver Arrays(BS-6.Observation, communication and positioning technology of equipments mounted on satellite, aircraft, ship and ground,ENGLISH SESSION)
- A Gate Sizing Approach with Accurate Delay Model for Power and Area Optimization under Delay Constraints
- Area-Effective Inductive Peaking with Interwoven Inductor for High-Speed Laser-Diode Driver for Optical Communication System
- The Aerodynamic Performance of a Horizontal-Axis Wind Turbine Calculated by Strip Theory and Cascade Theory
- Accurate Estimation of the Worst-case Delay in Statistical Static Timing Analysis
- Variable RF Inductor on Si CMOS Chip
- Effect of Regularity-Enhanced Layout on Variability and Circuit Performance of Standard Cells
- A Radiation-Hard Redundant Flip-Flop to Suppress Multiple Cell Upset by Utilizing the Parasitic Bipolar Effect
- On-Chip Detection of Process Shift and Process Spread for Post-Silicon Diagnosis and Model-Hardware Correlation
- Standard Cell Structure with Flexible P/N Well Boundaries for Near-Threshold Voltage Operation