Lai Chien | Central R&D Division, United Microelectronics Corporation, Tainan 74145, Taiwan

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概要

関連著者

Wu San
Department Of Electronic Engineering Cheng Shiu University
Chen Jone
Department Of Electrical Engineering And Institute Of Microelectronics National Cheng Kung Universit
Chang Shoou
Department Of Electrical Engineering National Cheng Kung University
Chang Yee
Department Of Material Science Engineering National Cheng Kung University
Cheng Osbert
Central R&D Division, United Microelectronics Corporation (UMC), Hsinchu 30077, Taiwan, R.O.C.
Huang Po
Department of Electrical Engineering, National Chi Nan University, No. 1 University Rd. Puli 545, Taiwan
Chiu Hsu
Department of Materials Science and Engineering, National Tsing Hua University, Hsinchu 30013, Taiwan
Tsai Shih
Department of Electrical Engineering, National Cheng Kung University, Tainan 70101, Taiwan
Lai Chien
Central R&D Division, United Microelectronics Corporation, Tainan 74145, Taiwan
Hsu Chia
Central R&D Division, United Microelectronics Corporation, Tainan 74145, Taiwan
Hsu Chia
Central R&D Division, United Microelectronics Corporation, Tainan 74145, Taiwan
Lai Chien
Central R&D Division, United Microelectronics Corporation, Tainan 74145, Taiwan
Cheng Osbert
Central R&D Division, United Microelectronics Corporation, Tainan 74145, Taiwan
Huang Po
Department of Electrical Engineering, National Cheng Kung University, Tainan 70101, Taiwan
Wu San
Department of Electronic Engineering, Cheng Shiu University, Kaohsiung 83347, Taiwan
Chen Jone
Department of Electrical Engineering, National Cheng Kung University, Tainan 70101, Taiwan
Chang Shoou
Department of Electrical Engineering, National Cheng Kung University, Tainan 70101, Taiwan

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著作論文

Effect of Annealing Process on Trap Properties in High-k/Metal Gate n-Channel Metal--Oxide--Semiconductor Field-Effect Transistors through Low-Frequency Noise and Random Telegraph Noise Characterization

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