KIM D. | Department of Information and Communications, Gwangju Institute of Science and Technology
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- Department of Information and Communications, Gwangju Institute of Science and Technologyの論文著者
Department of Information and Communications, Gwangju Institute of Science and Technology | 論文
- Synthesis for Testability of Synchronous Sequential Circuits with Strong-Connectivity Using Undefined States on State Transition Graph(Test)(VLSI Design and CAD Algorithms)
- High-Level Test Generation for Asynchronous Circuits from Signal Transition Graph(Special Section on VLSI Design and CAD Algorithms)
- Design of a Mutated Adder and Its Optimization Using ILP Formulation(Digital Circuits and Computer Arithmetic, Recent Advances in Circuits and Systems-Part 1)
- Low Latency Four-Flop Synchronizer with the Handshake Interface(Communications and Wireless Systems, Recent Advances in Circuits and Systems-Part 1)
- A Low Latency Asynchronous FIFO Combining a Wave Pipeline with a Handshake Scheme(VLSI Design Technology and CAD)