Nakazato Kazuo | Hitachi Cambridge Laboratory:CREST JST (Japan Science and Technology)
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Hitachi Cambridge Laboratory:CREST JST (Japan Science and Technology) | 論文
- Characterization of Tunnel Barriers in Polycrystalline Silicon Point-Contact Single-Electron Transistors
- Carrier Transport across a Few Grain Boundaries in Highly Doped Polycrystalline Silicon : Electrical Properties of Condensed Matter
- Single Electron Charging Phenomena in Silicon Nano-Pillars With and Without Silicon Nitride Tunnel Barriers
- Simulation of the Effect of Emitter Doping on the Delay Time in AlGaAs/GaAs Heterojunction Bipolar Transistors
- Hybrid Circuit Simulator Including a Model for Single Electron Tunneling Devices