スポンサーリンク

Hitachi Cambridge Laboratory:CREST JST (Japan Science and Technology) | 論文

• Characterization of Tunnel Barriers in Polycrystalline Silicon Point-Contact Single-Electron Transistors
• Carrier Transport across a Few Grain Boundaries in Highly Doped Polycrystalline Silicon : Electrical Properties of Condensed Matter
• Single Electron Charging Phenomena in Silicon Nano-Pillars With and Without Silicon Nitride Tunnel Barriers
• Hybrid Circuit Simulator Including a Model for Single Electron Tunneling Devices
• Nanostructure Fabrication Based on Sporntaneous Formation Mechanisms
• Simulation of the Effect of Emitter Doping on the Delay Time in AlGaAs/GaAs Heterojunction Bipolar Transistors

スポンサーリンク