Yamamura Tsuyoshi | Graduate School Of Sci. & Eng Kansai University
スポンサーリンク
概要
関連著者
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Sato Shingo
Graduate School Of Engineering Hokkaido University
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Yamamura Tsuyoshi
Graduate School Of Sci. & Eng Kansai University
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Omura Yasuhisa
Graduate School Of Eng Kansai University
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Omura Yasuhisa
Graduate School Of Sci. & Eng Kansai University
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Sato Shingo
Graduate School Of Sci. & Eng Kansai University
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Omura Yasuhisa
Ordist Dept. Electronics Kansai University
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Sato Shingo
Graduate School of Science and Technology, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564-8680, Japan
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Omura Yasuhisa
ORDIST and Graduate School of Engineering, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564-8680, Japan
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Omura Yasuhisa
ORDIST, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564-8680, Japan
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Yamamura Tsuyoshi
Graduate School of Science and Technology, Kansai University, 3-3-35 Yamate-cho, Suita, Osaka 564-8680, Japan
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Omura Yasuhisa
ORDIST and Graduate School of Engineering Science, Kansai University, Suita, Osaka 564-8680, Japan
著作論文
- Behavior of Low-Temperature Phonon-Limited Electron Mobility of Double-Gate Field-Effect Transistor with (111) Si Surface Channel
- Empirical Model of Phonon-Limited Electron Mobility for Ultra-Thin Body SOI MOSFET
- Low-Temperature Behaviors of Phonon-Limited Electron Mobility of Sub-10-nm-Thick Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistor with (001) and (111) Si Surface Channels