三浦 幸也 | 首都大
スポンサーリンク
概要
関連著者
著作論文
- RC-014 A Feasibility Study of Active Current Testing
- RC-011 A Case Study on Identification of Circuit Variation by Transistor States
- LC-012 Dependable Clock Design for Level Sensitive Clock Signal
- LC_007 Proposal of Dependable Clock Signal Distribution
- LC-004 Feasibility of Interconnect Open Detection by Ramp Voltage Application
- LC-005 Open Fault Detection in CMOS Combinational Circuits by Logic Testing with Precharging
- RC-003 Dependable Techniques for Noise Block and Delay Variation Detection/Correction
- RC-003 Dependable Dual Edge Triggered Flip-Flops for Bloking Noise Signal