RC-014 A Feasibility Study of Active Current Testing
スポンサーリンク
概要
- 論文の詳細を見る
This paper proposes a new current testing method, active current testing, for detecting various fault classes of CMOS circuits. The proposed method is an extended method of VDD ramp testing, and it is carried out by applying various input signals for the circuit under test. If a power supply current is measured by changing both a power supply voltage and an input signal, we can make the internal condition of a circuit various. Then, fault detection by current testing becomes more effective than conventional VDD ramp testing. We apply active current testing to two CMOS circuits, an operational amplifier and a level shifter, and demonstrate its fault detection ability. Except for the special case of circuit behavior, we found that active current testing can detect both hard faults (i.e., short and open faults) and soft faults (i.e., process variations and reliability degradation).
- FIT(電子情報通信学会・情報処理学会)推進委員会の論文
- 2009-08-20
著者
関連論文
- RC-014 A Feasibility Study of Active Current Testing
- RC-011 A Case Study on Identification of Circuit Variation by Transistor States
- LC-012 Dependable Clock Design for Level Sensitive Clock Signal
- LC_007 Proposal of Dependable Clock Signal Distribution
- LC-004 Feasibility of Interconnect Open Detection by Ramp Voltage Application
- LC-005 Open Fault Detection in CMOS Combinational Circuits by Logic Testing with Precharging
- RC-003 Dependable Techniques for Noise Block and Delay Variation Detection/Correction
- RC-003 Dependable Dual Edge Triggered Flip-Flops for Bloking Noise Signal