Liu Ziyuan | Device Analysis Technology Labs. Nec Corporation
スポンサーリンク
概要
関連著者
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Liu Ziyuan
Device Analysis Technology Labs. Nec Corporation
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MIYAGAWA Hayato
Department of Advanced Materials Science, Faculty of Engineering, Kagawa University
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Hamada T
Device Analysis Technology Labs. Nec Corporation
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Kawashima Y
Tokyo Inst. Technol. Yokohama Jpn
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KAWASHIMA Yoshiya
Device Analysis Technology Labs., NEC Corporation
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KOMATSU Atsushi
NEC Hiroshima Corporation
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HAMADA Takehiko
Device Analysis Technology Labs., NEC Corporation
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KAWANO Hideo
Device Analysis Technology Labs., NEC Corporation
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SHIOTANI Keiji
Device Analysis Technology Labs., NEC Corporation
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Shiotani K
Univ. Tsukuba Tsukuba Jpn
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Kawano H
Graduate School Of Science And Technology Kobe University
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Kamigaki Yoshiaki
Department of Advanced Materials Science, Faculty of Engineering, Kagawa University, Takamatsu 761-0396, Japan
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Mitoh Hiroyuki
Department of Advanced Materials Science, Faculty of Engineering, Kagawa University, Takamatsu 761-0396, Japan
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Ando Shinichiro
Department of Advanced Materials Science, Faculty of Engineering, Kagawa University, Takamatsu 761-0396, Japan
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Koshiba Shyun
Department of Advanced Materials Science, Faculty of Engineering, Kagawa University, Takamatsu 761-0396, Japan
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Ishigaki Hirokazu
Devices and Analysis Technology Division, Renesas Electronics Corporation, Kawasaki 211-8668, Japan
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Aozasa Hiroshi
Department of Advanced Materials Science, Faculty of Engineering, Kagawa University, Takamatsu 761-0396, Japan
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Koshiba Shyun
Department of Advanced Materials Science, Faculty of Engineering, Kagawa University, 2217-20 Hayashi-cho, Takamatsu 761-0396, Japan
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Miyagawa Hayato
Department of Advanced Materials Science, Faculty of Engineering, Kagawa University, Takamatsu 761-0396, Japan
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Liu Ziyuan
Devices and Analysis Technology Division, Renesas Electronics Corporation, Kawasaki 211-8668, Japan
著作論文
- Formation Mechanism of Metal-Oxides on Plasma-Exposed WSi_x/poly Si Gate Stacks
- Electron Spin Resonance Observation of Bias-Temperature Stress-Induced Interface Defects at NO/N2O-Annealed Chemical-Vapor-Deposition SiO2/(100) p-Si Substrates