Kong Jeong-taek | Samsung Electronics Co. Ltd.

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概要

• KONG Jeong-Taekの詳細を見る
• 同名の論文著者
• Samsung Electronics Co. Ltd.の論文著者

関連著者

• Kong Jeong-taek

  Samsung Electronics Co. Ltd.

• Kong Jeong-Taek

  Samsung Electronics Co., Ltd.

• 小柳 光正

  東北大学大学院工学研究科機械知能工学専攻知能システム設計学研究室

• Park Ki-tae

  Halo Lsi Inc.:tohoku University

• Choi Kyu-myung

  Samsung Electronics Co. Ltd.

• KURINO Hiroyuki

  Tohoku University

• MIZUKUSA Tomokatsu

  Tohoku University

• WON Hyo-Sig

  Samsung Electronics Co. Ltd.

• Kurino H

  Dept. Of Bioengineering And Robotics Graduate School Of Engineering Tohoku University

• Kurino H

  Tohoku University

• Kurino Hiroyuki

  Department Of Bioengineering And Robotics Graduate School Of Engineering Tohoku University

• Jung Won-young

  Verilux Design Technology

• KOYANAGI Mitsumasa

  Dept. Bioengineering and Robotics, Tohoku University

• Lee K‐h

  Korea Univ. Seoul Kor

• Oh Soo-Young

  Verilux Design Technology

• Lee Keun-Ho

  Samsung Electronics Co., Ltd.

• KOYANAGI Mitsumasa

  Tohoku University

• PARK Ki-Tae

  Dept. of Machine Intelligence and Systems Engineering, Tohoku University

• MIZUKUSA Tomokatsu

  Dept. of Machine Intelligence and Systems Engineering, Tohoku University

• KURINO Hiroyuki

  Dept. of Machine Intelligence and Systems Engineering, Tohoku University

• Han Tae

  School Of Information And Communication Engineering Sungkyunkwan University

• Lee Keun-ho

  Samsung Electronics Co. Ltd.

• Kurino Hiroyuki

  Dept. Of Bioengineering And Robotics Graduate School Of Engineering Tohoku University

• Kong Bai-Sun

  School of Inform. and Comm. Eng., Sungkyunkwan University

• Lee Hoi-Jin

  School of Inform. and Comm. Eng., Sungkyunkwan University

• Kim Jong-Woo

  School of Inform. and Comm. Eng., Sungkyunkwan University

• Son Jae

  SOC Team, System LSI Division, Samsung Electronics

• Kong Jeong-Taek

  Samsung Semiconductor Institute of Technology, Samsung Electronics

• Han Tae

  School of Inform. and Comm. Eng., Sungkyunkwan University

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著作論文

• Interconnect Modeling in Deep-Submicron Design (Special lssue on SISPAD'99)
• A Power-Down Circuit Scheme Using Data-Preserving Complementary Pass Transistor Flip-Flop for Low-Power High-Performance Multi-Threshold CMOS LSI(Electronic Circuits)
• Low-Power Data-Preserving Complementary Pass-Transistor-Based Circuit for Power-Down Circuit Scheme
• Low-power dual-supply clock networks with clock gating and frequency doubling

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