Nojima Reiko | Semiconductor Da & Test Center Toshiba Corporation
スポンサーリンク
概要
関連著者
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Goto N
Ulsi Research Labolatories R & D Center Toshiba Corporation
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Yamada M
Mitsubishi Electric Corp. Itami‐shi Jpn
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GOTO Nobuyuki
ULSI Research Labolatories, R & D Center, TOSHIBA CORPORATION
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Nojima Reiko
Semiconductor Da & Test Center Toshiba Corporation
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Kojima Naohito
Semiconductor Da & Test Center Toshiba Corporation
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Yamada M
Kanazawa Univ. Kanazawa‐shi Jpn
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Kurosawa Sachiko
Semiconductor Da & Test Center Toshiba Corporation
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Mitsuhashi Takashi
Semiconductor Da & Test Center Toshiba Corporation
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Tachibana Masayoshi
Semiconductor Da & Test Center Toshiba Corporation
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Yamada Masaaki
Semiconductor Da & Test Center Toshiba Corporation
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KUROSAWA Sachiko
Semiconductor DA & Test Center, TOSHIBA CORPORATION
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NOJIMA Reiko
Semiconductor DA & Test Center, TOSHIBA CORPORATION
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KOJIMA Naohito
Semiconductor DA & Test Center, TOSHIBA CORPORATION
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MITSUHASHI Takashi
Semiconductor DA & Test Center, TOSHIBA CORPORATION
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Yamada Masaaki
ULSI Research Labs., RampD Center, TOSHIBA CORPORATION
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Kurosawa Sachiko
ULSI Research Labs., RampD Center, TOSHIBA CORPORATION
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Nojima Reiko
ULSI Research Labs., RampD Center, TOSHIBA CORPORATION
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Kojima Naohito
ULSI Research Labs., RampD Center, TOSHIBA CORPORATION
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Mitsuhashi Takashi
ULSI Research Labs., RampD Center, TOSHIBA CORPORATION
著作論文
- Power and Area Minimization by Reorganizing CMOS Complex-Gates (Special Section of Selected Papers from the 8th Karuizawa Workshop on Circuits and Systems)
- Synergistic Power/Area Optimization with Transistor Sizing and Wire Length Minimization