SHIN Kyeong | Process Engineering Dept. 5, MagnaChip Semiconductor Ltd.

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概要

• 同名の論文著者
• Process Engineering Dept. 5, MagnaChip Semiconductor Ltd.の論文著者

関連著者

• Jeong Yang

  Department Of Electrical And Semiconductor Engineering Chonnam National University

• Jeong Y

  Boe-hydis Co. Ltd. Kyungki‐do Kor

• MUN Seong

  Process Engineering Dept. 5, MagnaChip Semiconductor Ltd.

• SHIN Kyeong

  Process Engineering Dept. 5, MagnaChip Semiconductor Ltd.

• Mun Seong

  Process Engineering Dept. 5 Magnachip Semiconductor Ltd.

• Kwak J

  Hanyang Univ. Seoul Kor

• KWAK Jong

  Process Engineering Dept. 5, MagnaChip Semiconductor., Ltd.

• Kim Jae

  Department of Anatomy, College of Medicine, Pusan National University

• KIM Dae

  Department of Anatomy and Center for Advanced Medical Education by BK21 Project, Inha University Col

• Kim Dae

  Department Of System Ic R&d Magnachip Semiconductor Ltd.

• Ryu Hyuk

  System Ic R&d Center Hynix Electronics Industries Co. Ltd.

• Jeong Jae

  Department Of Nuclear Medicine Seoul National University College Of Medicine

• Huh Sang

  Process Engineering Dept. 5 Magnachip Semiconductor Ltd.

• KANG Seong

  Department of Veterinary Surgery, College of Veterinary Medicine and Veterinary Medical Research Cen

• JU Je

  Department of System IC R&D, Magnachip Semiconductor Ltd.

• Ju Je

  Department Of System Ic R&d Magnachip Semiconductor Ltd.

• LEE Sung

  Process Engineering Dept. 5, MagnaChip Semiconductor., Ltd.

• YOON Ki

  Process Engineering Dept. 5, HYNIX Electronics Industries Co., Ltd.

• Shin Kyeong

  Process Engineering Dept. 5 Magnachip Semiconductor Ltd.

• Mun Seong

  Process Engineering Dept. 5 Hynix Electronics Industries Co. Ltd.

• Kwak Jong

  Process Engineering Dept. 5 Hynix Electronics Industries Co. Ltd.

• Jeong Yang

  Department Of Electrical & Semiconductor Engineering Yosu National University

• Shin Kyeong

  Process Engineering Dept. 5 Hynix Electronics Industries Co. Ltd.

• Yoon Ki

  Process Engineering Dept. 5 Hynix Electronics Industries Co. Ltd.

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著作論文

• Layout Dependent Induced Leakage and its Prevention with Different Shallow Trench Isolation Schemes in 0.18μm Dual Gate Complementary Metal Oxide Semiconductor Technology
• Etch Defect Reduction Using SF_6/O_2 Plasma Cleaning and Optimizing Etching Recipe in Photo Resist Masked Gate Poly Silicon Etch Process
• Shallow Trench Isolation Top Corner Rounding Using Si Soft Etching Following Diluted Hydrofluorine Solution

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