YANAGISAWA Masao | Dept. of Computer Science, Waseda University
スポンサーリンク
概要
関連著者
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TOGAWA Nozomu
Dept. of Computer Science, Waseda University
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YANAGISAWA Masao
Dept. of Computer Science, Waseda University
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OHTSUKI Tatsuo
Dept. of Computer Science, Waseda University
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Togawa N
Univ. Kitakyushu Kitakyushu‐shi Jpn
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Togawa Nozomu
The Dept. Of Computer Science Waseda University
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Togawa Nozomu
Dept. Of Computer Science Waseda University
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Yanagisawa M
The Dept. Of Computer Science Waseda University
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Yanagisawa Masao
Department Of Computer Science Waseda University
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Ohtsuki Tatsuo
Department Of Computer Science And Engineering Waseda University
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Yanagisawa Masao
Dept. Electronics Waseda Univ.
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Ohtsuki Tomoaki
The Department Of Electrical Engineering Science University Of Tokyo
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Ohtsuki T
Department Of Electrical Engineering Tokyo University Of Science
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Masao Yanagisawa
School of Fundamental Science and Engineering Waseda University
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Togawa Nozomu
Dept. of Computer Science and Engineering, Waseda University
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Ohtsuki T
Tokyo Univ. Sci. Noda‐shi Jpn
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Ohtsuki Tatsuo
Department of Computer Science and Engineering, Waseda University
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UCHIDA Jumpei
Dept. of Computer Science, Waseda University
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UCHIDA Jumpei
the Dept. of Computer Science, Waseda University
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Ohtsuki T
Waseda Univ. Tokyo Jpn
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Uchida Jumpei
The Dept. Of Computer Science Waseda University
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Shimizu Kazunori
Graduate School Of Information Production And Systems Waseda University
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MIYAOKA Yuichiro
Dept. of Electronics, Information and Communication Engineering, Waseda University
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MIYAOKA Yuichiro
Department of Computer Science, Waseda University
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CHOI Jinku
Department of Computer Engineering,Korea Polytechnic University
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CHOI Jinku
Dept. of Electronics, Information and Communication Engineering Waseda University
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Choi J
Korea Univ. Seoul Kor
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Miyaoka Yuichiro
Department Of Computer Science Waseda University
著作論文
- FPGA-Based Reconfigurable Adaptive FEC(System Level Design)(VLSI Design and CAD Algorithms)
- High-Level Power Optimization Based on Thread Partitioning(System Level Design)(VLSI Design and CAD Algorithms)
- C-5 A Software/Hardware Codesign for MPEG Encoder