CHANG Sung-Keun | Semiconductor Advanced Research Division, Hyundai Electronics Industries

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著作論文

Characteristics of Dual Polymetal (W/WNx/Poly-Si) Gate CMOS for 0.1μm DRAM Technology
A 0.1μm CMOS Technology using W/WN_x/Polysilicon Dual Gate Electrode for 4G DRAM and Beyond
A 0.1μm CMOS Technology using W/WN_x/Polysilicon Dual Gate Electrode for 4G DRAM and Beyond
A 0.1μm CMOS Technology using W/WN_x/Polysilicon Dual Gate Electrode for 4G DRAM and Beyond

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