A Novel Sub-20 V Contact Gate Metal Oxide Semiconductor Field Effect Transistor with Fully Complementary Metal Oxide Semiconductor Compatible Process

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概要

• 論文の詳細を見る

• In this paper, a novel sub-20 V device which is called contact gate MOSFET (CGMOS) with fully CMOS logic compatible process is proposed and demonstrated. Comparing with lateral double diffusion MOSFET (LDMOS), CGMOS uses P substrate instead of N minus layer as drift region in logic process, and a contact on resistance protection oxide (RPO) layers to form an extra gate on the drain side of the channel region to provide a better gate control and reduce the surface field. This new device significantly rises up the breakdown voltage to 18 V with specific on-resistance 8.8 m\Omega\cdotmm²in a small high voltage (HV) MOSFET area. Since there is no extra mask for creating the drift region or additional step for the wire bonding, CGMOS makes the integration of high voltage and logic circuits much simpler and area-saving.

• 2013-04-25

著者

• Lin Chrong

  Microelectronics Lab., STAR Group, Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan, R.O.C.

• King Ya

  Microelectronics Laboratory, Institute of Electronics Engineering, National Tsing-Hua University, Hsinchu 300, Taiwan

• Tsai Ming

  Microelectronics Laboratory, Institute of Electronics Engineering, National Tsing-Hua University, Hsinchu 300, Taiwan

• Lee Te

  Microelectronics Laboratory, Institute of Electronics Engineering, National Tsing-Hua University, Hsinchu 300, Taiwan

関連論文

• Multilevel Antifuse Cells with Programmable Contact in Pure 90 nm Logic Process
• Trench Termination Design and Analysis in Low-Voltage N-Channel Trench Power Metal–Oxide–Semiconductor Field-Effect Transistor
• P-Channel Lateral Double-Diffused Metal–Oxide–Semiconductor Field-Effect Transistor with Split N-Type Buried Layer for High Breakdown Voltage and Low Specific On-Resistance
• A Novel Sub-20 V Contact Gate Metal Oxide Semiconductor Field Effect Transistor with Fully Complementary Metal Oxide Semiconductor Compatible Process

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