Si

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The interaction between two stress techniques, strain-relaxed buffers (SRBs) and epitaxial source/drain stressors, is studied on short, Si<inf>1-x</inf>Ge<inf>x</inf>- and Ge-channel planar transistors. This work focuses on the longitudinal channel stress generated by these two techniques. Unlike for unstrained silicon-channel transistors, for strained channels on top of a strain-relaxed buffer a source/drain stressor without recess generates similar longitudinal channel stress than source/drain stressors with a deep recess. The least efficient stress transfer is obtained for source/drain stressors with a small recess that removes only the strained channel, not the substrate underneath. These trends are explained by a trade-off between elastic relaxation of the strained-channel during source/drain recess and the increased stress generation of thicker source/drain stressors. For Ge-channel pFETs, GeSn source/drains and Si<inf>1-x</inf>Ge<inf>x</inf>strain-relaxed buffers are efficient stressors for mobility enhancement. The former is more efficient for gate-last schemes than for gate-first, while the stress generated by the SRB is found to be independent of the gate-scheme.
2013-04-25